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TTa Course Level 1

Building on the techniques presented in our Level 0 course, this course takes a closer look at the development of reliable embedded systems using modern ‘Time Triggered’ (TT) software architectures.  In a TT software platform, a single interrupt will be used, linked to the periodic overflow of a timer.  A ‘polling’ process will then allow interaction with peripherals.  By the end of the course participants will understand how such TT architectures can be applied to create reliable products using one or more embedded processors.  Comparisons with traditional ‘Event Triggered’ (ET) designs are made throughout the course.

All the examples in this course are in the ‘C’ programming language.

Key features of this course

  • A consistent focus on the creation of reliable embedded systems in a wide range of sectors.
  • Provides an introduction to modern time-triggered (TT) system architectures.
  • Provides a solid foundation for people interested in the development of safety-related systems.


Course objectives

After completing this course, participants should:

  • Understand the key concepts of “real-time” systems and the importance of timing behavior when creating reliable embedded systems.
  • Understand key design and programming techniques which can help to improve the reliability of embedded systems for use in a range of different market sectors.
  • Understand time-triggered (TT) software architectures.
  • Understand how to test and debug existing embedded systems.
  • Be ready for more advanced training in software design and system verification.



Level 0 Certification or Experienced Professionals wishing to learn about TT architectures.


  • What is an Embedded and a Deeply Embedded System.
  • Discussion on 8051 architecture.
  • Why use C?
  • Difference between writing code for desktop and an embedded system and the differences in their software architecture.
  • What are TASKS?
  • What is a Real Time Embedded System?
  • Accuracy of Loop Delays and Hardware Delays.
  • What are Sandwich delays and why do we use them?
  • What are timeout mechanisms and why and when do we need to timeout?
  • What is the concept of balanced code?
  • Concept of Worst Case Execution Time (WCET) and Best Case Execution Time (BCET) of Tasks.
  • Understanding Interrupts and Interrupt response time.
  • Understanding TT embedded operating system.
  • Explore Co-operative and Hybrid schedulers and why we need them and when to employ them.
  • How to handle Task Jitter?
  • Timing analysis of tasks.
  • Compare 8-bit 8051, 32- bit ARM, soft processor implemented on FPGA and x86 platforms and how the performance is affected in each case.
  • Which platform is reliable if employed in aerospace systems?
  • What are multitasking systems?
  • Running multiple tasks on a single CPU system with Task preemption. Here we learn about implementing a system employing a Hybrid scheduler.  We also explore why a commercial RTOS may not be a good choice in systems where there are tight timing constraints.
  • What is Priority Inversion and how to avoid it using Hybrid schedulers?
  • What are distributed systems and their interconnection topologies?
  • How are tasks running on different nodes  synchronized in distributed systems?
  • CAN protocol and its use in distributed systems.


Mode of assessment for CERTIFICATION

Closed book exam with university style conditions.

Planned Exercises that would be submitted by candidates during the course. The exercises are critical in refining the skills learnt during the course.


On successful completion of the course candidates will receive LEVEL 1 Certification from SafeTTy Systems.